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| a FEATURES Pretrimmed to 0.25% max 4-Quadrant Error (AD534L) All Inputs (X, Y and Z) Differential, High Impedance for [(X1 - X 2) (Y 1 - Y 2 )/10 V] + Z2 Transfer Function Scale-Factor Adjustable to Provide up to X100 Gain Low Noise Design: 90 V rms, 10 Hz-10 kHz Low Cost, Monolithic Construction Excellent Long Term Stability APPLICATIONS High Quality Analog Signal Processing Differential Ratio and Percentage Computations Algebraic and Trigonometric Function Synthesis Wideband, High-Crest rms-to-dc Conversion Accurate Voltage Controlled Oscillators and Filters Available in Chip Form PRODUCT DESCRIPTION X1 X2 Internally Trimmed Precision IC Multiplier AD534 PIN CONFIGURATIONS TO-100 (H-10A) Package TO-116 (D-14) Package X1 1 X2 2 SF 14 13 +VS OUT +VS NC OUT AD534 TOP VIEW (Not To Scale) NC 3 SF 4 AD534 12 Y1 Y2 -VS Z2 Z1 TOP VIEW 11 Z1 (Not to Scale) 10 Z2 NC 5 Y1 6 Y2 7 9 8 NC -VS NC = NO CONNECT LCC (E-20A) Package NC +VS NC X2 3 X1 The AD534 is a monolithic laser trimmed four-quadrant multiplier divider having accuracy specifications previously found only in expensive hybrid or modular products. A maximum multiplication error of 0.25% is guaranteed for the AD534L without any external trimming. Excellent supply rejection, low temperature coefficients and long term stability of the on-chip thin film resistors and buried Zener reference preserve accuracy even under adverse conditions of use. It is the first multiplier to offer fully differential, high impedance operation on all inputs, including the Z-input, a feature which greatly increases its flexibility and ease of use. The scale factor is pretrimmed to the standard value of 10.00 V; by means of an external resistor, this can be reduced to values as low as 3 V. The wide spectrum of applications and the availability of several grades commend this multiplier as the first choice for all new designs. The AD534J ( 1% max error), AD534K ( 0.5% max) and AD534L ( 0.25% max) are specified for operation over the 0C to +70C temperature range. The AD534S (1% max) and AD534T ( 0.5% max) are specified over the extended temperature range, -55C to +125C. All grades are available in hermetically sealed TO-100 metal cans and TO-116 ceramic DIP packages. AD534J, K, S and T chips are also available. PROVIDES GAIN WITH LOW NOISE 2 1 20 19 NC 4 NC 5 SF 6 NC 7 NC 8 18 OUT AD534 TOP VIEW (Not To Scale) 17 NC 16 Z1 15 NC 14 Z2 9 Y1 10 Y2 11 12 13 -VS NC NC NC = NO CONNECT such as those used to generate sine and tangent. The utility of this feature is enhanced by the inherent low noise of the AD534: 90 V, rms (depending on the gain), a factor of 10 lower than previous monolithic multipliers. Drift and feedthrough are also substantially reduced over earlier designs. UNPRECEDENTED FLEXIBILITY The AD534 is the first general purpose multiplier capable of providing gains up to X100, frequently eliminating the need for separate instrumentation amplifiers to precondition the inputs. The AD534 can be very effectively employed as a variable gain differential input amplifier with high common-mode rejection. The gain option is available in all modes, and will be found to simplify the implementation of many function-fitting algorithms The precise calibration and differential Z-input provide a degree of flexibility found in no other currently available multiplier. Standard MDSSR functions (multiplication, division, squaring, square-rooting) are easily implemented while the restriction to particular input/output polarities imposed by earlier designs has been eliminated. Signals may be summed into the output, with or without gain and with either a positive or negative sense. Many new modes based on implicit-function synthesis have been made possible, usually requiring only external passive components. The output can be in the form of a current, if desired, facilitating such operations as integration. REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999 AD534-SPECIFICATIONS (@ T = + 25 C, A VS = 15 V, R 2 k ) Max Min AD534K Typ Max Min AD534L Typ Max Units Model Min MULTIPLIER PERFORMANCE Transfer Function Total Error 1 (-10 V X, Y +10 V) TA = min to max Total Error vs. Temperature Scale Factor Error (SF = 10.000 V Nominal) 2 Temperature-Coefficient of Scaling Voltage Supply Rejection ( 15 V 1 V) Nonlinearity, X (X = 20 V p-p, Y = 10 V) Nonlinearity, Y (Y = 20 V p-p, X = 10 V) Feedthrough 3, X (Y Nulled, X = 20 V p-p 50 Hz) Feedthrough 3, Y (X Nulled, Y = 20 V p-p 50 Hz) Output Offset Voltage Output Offset Voltage Drift DYNAMICS Small Signal BW (V OUT = 0.1 rms) 1% Amplitude Error (CLOAD = 1000 pF) Slew Rate (V OUT 20 p-p) Settling Time (to 1%, VOUT = 20 V) NOISE Noise Spectral-Density SF = 10 V SF = 3 V4 Wideband Noise f = 10 Hz to 5 MHz Wideband Noise f = 10 Hz to 10 kHz OUTPUT Output Voltage Swing Output Impedance (f 1 kHz) Output Short Circuit Current (R L = 0, T A = min to max) Amplifier Open Loop Gain (f = 50 Hz) INPUT AMPLIFIERS (X, Y and Z) 5 Signal Voltage Range (Diff. or CM Operating Diff.) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error 1 (X = 10 V, -10 V Z +10 V) (X = 1 V, -1 V Z +1 V) (0.1 V X 10 V, -10 V Z 10 V) SQUARE PERFORMANCE Transfer Function Total Error (-10 V X 10 V) SQUARE-ROOTER PERFORMANCE Transfer Function (Z 1 Z2) Total Error 1 (1 V Z 10 V) POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance Operating Supply Current Quiescent PACKAGE OPTIONS TO-100 (H-10A) TO-116 (D-14) Chips NOTES 1 AD534J Typ ( X1 - X 2 )(Y1 - Y 2 ) + Z2 10 V ( X1 - X 2 )(Y1 - Y 2 ) + Z2 10 V ( X1 - X 2 )(Y1 - Y 2 ) + Z2 10 V 1.5 0.022 0.25 0.02 0.01 0.4 0.2 0.3 0.01 5 200 1 50 20 2 0.8 0.4 1 90 11 0.1 30 70 10 12 5 100 5 200 80 0.8 0.1 10 ( Z 2 - Z1 ) + Y1 ( X1 - X 2 ) 1.0 1.0 0.015 0.1 0.01 0.01 0.2 0.1 0.15 0.5 0.5 0.008 0.1 0.005 0.01 0.10 0.005 0.05 0.003 2 100 1 50 20 2 0.8 0.4 1 90 11 0.25 % % %/C % %/C % % % % % mV V/C MHz kHz V/s s V/Hz V/Hz mV/rms V/rms V mA dB V V mV V/C mV V/C dB A A M 0.3 0.1 0.3 0.1 15 0.12 0.1 0.12 0.1 10 30 0.01 2 100 1 50 20 2 0.8 0.4 1 90 11 0.1 30 70 10 12 2 50 2 100 90 0.8 0.1 10 ( Z 2 - Z1 ) + Y1 ( X1 - X 2 ) 0.1 30 70 10 12 2 50 2 100 90 0.8 0.05 10 ( Z 2 - Z1 ) + Y1 ( X1 - X 2 ) 20 30 70 2.0 10 15 70 2.0 10 10 2.0 0.2 60 10 V 10 V 10 V 0.75 2.0 2.5 ( X1 - X 2 )2 + Z2 10 V 0.35 1.0 1.0 ( X1 - X 2 )2 + Z2 10 V 0.2 0.8 0.8 ( X1 - X 2 )2 + Z2 10 V % % % 0.6 10 V ( Z 2 - Z1 ) + X 2 0.3 10 V ( Z 2 - Z1 ) + X 2 0.2 10 V ( Z 2 - Z1 ) + X 2 % 1.0 15 18 4 AD534JH AD534JD 6 0.5 15 18 4 AD534KH AD534KD AD534K Chips 6 0.25 15 18 4 6 AD534LH AD534LD % 8 8 8 V V mA Figures given are percent of full scale, 10 V (i.e., 0.01% = 1 mV). 2 May be reduced down to 3 V using external resistor between -V S and SF. 3 Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using external resistor adjusted to give SF = 3 V. 5 See Functional Block Diagram for definition of sections. Specifications subject to change without notice. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. -2- REV. B AD534 Model Min MULTIPLIER PERFORMANCE Transfer Function Total Error1 (-10 V X, Y +10 V) TA = min to max Total Error vs. Temperature Scale Factor Error (SF = 10.000 V Nominal)2 Temperature-Coefficient of Scaling Voltage Supply Rejection (15 V 1 V) Nonlinearity, X (X = 20 V p-p, Y = 10 V) Nonlinearity, Y (Y = 20 V p-p, X = 10 V) Feedthrough 3, X (Y Nulled, X = 20 V p-p 50 Hz) Feedthrough 3, Y (X Nulled, Y = 20 V p-p 50 Hz) Output Offset Voltage Output Offset Voltage Drift DYNAMICS Small Signal BW (VOUT = 0.1 rms) 1% Amplitude Error (CLOAD = 1000 pF) Slew Rate (VOUT 20 p-p) Settling Time (to 1%, VOUT = 20 V) NOISE Noise Spectral-Density SF = 10 V SF = 3 V 4 Wideband Noise f = 10 Hz to 5 MHz Wideband Noise f = 10 Hz to 10 kHz OUTPUT Output Voltage Swing Output Impedance (f 1 kHz) Output Short Circuit Current (RL = 0, TA = min to max) Amplifier Open Loop Gain (f = 50 Hz) INPUT AMPLIFIERS (X, Y and Z) 5 Signal Voltage Range (Diff. or CM Operating Diff.) Offset Voltage X, Y Offset Voltage Drift X, Y Offset Voltage Z Offset Voltage Drift Z CMRR Bias Current Offset Current Differential Resistance DIVIDER PERFORMANCE Transfer Function (X1 > X2) Total Error1 (X = 10 V, -10 V Z +10 V) (X = 1 V, -1 V Z +1 V) (0.1 V X 10 V, -10 V Z 10 V) SQUARE PERFORMANCE Transfer Function Total Error (-10 V X 10 V) SQUARE-ROOTER PERFORMANCE Transfer Function (Z1 Z2 ) Total Error1 (1 V Z 10 V) POWER SUPPLY SPECIFICATIONS Supply Voltage Rated Performance Operating Supply Current Quiescent PACKAGE OPTIONS TO-100 (H-10A) TO-116 (D-14) E-20A Chips NOTES 1 2 3 AD534S Typ Max Min AD534T Typ Max Units ( X1 - X 2 )(Y1 - Y 2 ) + Z2 10 V ( X1 - X 2 )(Y1 - Y 2 ) + Z2 10 V 1.0 2.0 0.02 0.25 0.02 0.01 0.4 0.2 0.3 0.01 5 1.0 0.1 0.01 0.2 0.1 0.15 0.5 0.01 % % %/C % 0.005 0.3 0.1 0.3 0.1 15 300 %/C % % % % % mV V/C MHz kHz V/s s V/Hz V/Hz mV/rms V/rms V mA dB V V mV V/C mV V/C dB A A M 30 500 0.01 2 1 50 20 2 0.8 0.4 1.0 90 1 50 20 2 0.8 0.4 1.0 90 11 0.1 30 70 10 12 5 100 5 60 80 0.8 0.1 10 ( Z 2 - Z1 ) + Y1 ( X1 - X 2 ) 11 0.1 30 70 10 12 2 150 2 70 2.0 90 0.8 0.1 10 ( Z 2 - Z1 ) + Y1 ( X1 - X 2 ) 20 30 500 10 15 300 2.0 10 V 10 V 0.75 2.0 2.5 ( X1 - X 2 )2 + Z2 10 V 0.35 1.0 1.0 ( X1 - X 2 )2 + Z2 10 V % % % 0.6 10 V ( Z 2 - Z1 ) + X 2 0.3 10 V ( Z 2 - Z1 ) + X 2 % 1.0 15 22 4 AD534SH AD534SD AD534SE AD534S Chips 6 0.5 15 22 4 AD534TH AD534TD AD534T Chips 6 % 8 8 V V mA Figures given are percent of full scale, 10 V (i.e., 0.01% = 1 mV). May be reduced down to 3 V using external resistor between -V S and SF. Irreducible component due to nonlinearity: excludes effect of offsets. 4 Using external resistor adjusted to give SF = 3 V. 5 See Functional Block Diagram for definition of sections. Specifications subject to change without notice. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. REV. B -3- AD534 CHIP DIMENSIONS AND BONDING DIAGRAM Dimensions shown in inches and (mm). Contact factory for latest dimensions. X1 X2 +VS OUT ABSOLUTE MAXIMUM RATINGS AD534J, K, L Supply Voltage Internal Power Dissipation Output Short-Circuit to Ground Input Voltages, X1 X2 Y 1 Y 2 Z 1 Z 2 Rated Operating Temperature Range 18 V 500 mW Indefinite VS 0C to +70C AD534S, T 22 V * * * -55C to +125C -65C to +150C * +300C * SF 0.076 (1.93) Z1 Storage Temperature Range Lead Temperature Range, 60 s Soldering *Same as AD534J Specs. +VS Y1 Y2 0.100 (2.54) THE AD534 IS AVAILABLE IN LASER - TRIMMED CHIP FORM -VS Z2 50k 1k 470k TO APPROPRIATE INPUT TERMINAL Thermal Characteristics -VS Thermal Resistance JC = 25C/W for H-10A JA = 150C/W for H-10A JC = 25C/W for D-14 or E-20A JA = 95C/W for D-14 or E-20A Figure 1. Optional Trimming Configuration ORDERING GUIDE Model AD534JD AD534KD AD534LD AD534JH AD534JH/+ AD534KH AD534KH/+ AD534LH AD534K Chip AD534SD AD534SD/883B AD534TD AD534TD/883B JM38510/13902BCA JM38510/13901BCA AD534SE AD534SE/883B AD534TE/883B AD534SH AD534SH/883B AD534TH AD534TH/883B JM38510/13902BIA JM38510/13901BIA AD534S Chip AD534T Chip Temperature Range 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C -55C to +125C Package Description Side Brazed DIP Side Brazed DIP Side Brazed DIP Header Header Header Header Header Chip Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP Side Brazed DIP LCC LCC LCC Header Header Header Header Header Header Chip Chip Package Option D-14 D-14 D-14 H-10A H-10A H-10A H-10A H-10A D-14 D-14 D-14 D-14 D-14 D-14 E-20A E-20A E-20A H-10A H-10A H-10A H-10A H-10A H-10A CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD534 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. B AD534 FUNCTIONAL DESCRIPTION Figure 2 is a functional block diagram of the AD534. Inputs are converted to differential currents by three identical voltage-tocurrent converters, each trimmed for zero offset. The product of the X and Y currents is generated by a multiplier cell using Gilbert's translinear technique. An on-chip "Buried Zener" provides a highly stable reference, which is laser trimmed to provide an overall scale factor of 10 V. The difference between XY/SF and Z is then applied to the high gain output amplifier. This permits various closed loop configurations and dramatically reduces nonlinearities due to the input amplifiers, a dominant source of distortion in earlier designs. The effectiveness of the new scheme can be judged from the fact that under typical conditions as a multiplier the nonlinearity on the Y input, with X at full scale ( 10 V), is 0.005% of FS; even at its worst point, which occurs when X = 6.4 V, it is typically only 0.05% of FS Nonlinearity for signals applied to the X input, on the other hand, is determined almost entirely by the multiplier element and is parabolic in form. This error is a major factor in determining the overall accuracy of the unit and hence is closely related to the device grade. AD534 SF STABLE REFERENCE AND BIAS +VS -VS TRANSFER FUNCTION X1 X2 Y1 Y2 Z1 Z2 + V-1 - (X1 - X2) (Y1 - Y2) SF The user may adjust SF for values between 10.00 V and 3 V by connecting an external resistor in series with a potentiometer between SF and -VS. The approximate value of the total resistance for a given value of SF is given by the relationship: RSF = 5.4K SF 10 - SF Due to device tolerances, allowance should be made to vary RSF; by 25% using the potentiometer. Considerable reduction in bias currents, noise and drift can be achieved by decreasing SF. This has the overall effect of increasing signal gain without the customary increase in noise. Note that the peak input signal is always limited to 1.25 SF (i.e., 5 V for SF = 4 V) so the overall transfer function will show a maximum gain of 1.25. The performance with small input signals, however, is improved by using a lower SF since the dynamic range of the inputs is now fully utilized. Bandwidth is unaffected by the use of this option. Supply voltages of 15 V are generally assumed. However, satisfactory operation is possible down to 8 V (see Figure 16). Since all inputs maintain a constant peak input capability of 1.25 SF some feedback attenuation will be necessary to achieve output voltage swings in excess of 12 V when using higher supply voltages. OPERATION AS A MULTIPLIER + V-1 - TRANSLINEAR MULTIPLIER ELEMENT VO = A - (Z1 - Z2) Figure 3 shows the basic connection for multiplication. Note that the circuit will meet all specifications without trimming. X INPUT 10V FS 12V PK X1 X2 OUT = SF Z1 +VS +15V A HIGH GAIN OUTPUT AMPLIFIER OUT + V-1 - 0.75 ATTEN OUTPUT , 12V PK (X1 - X2) (Y1 - Y2) + Z2 10V Figure 2. Functional Block Diagram AD534 Z2 Y INPUT 10V FS 12V PK Y1 Y2 -VS -15V OPTIONAL SUMMING INPUT, Z, 10V PK The generalized transfer function for the AD534 is given by: ( X - X 2 ) (Y1 - Y 2 ) V OUT = A 1 - ( Z1 - Z2 ) SF where A = open loop gain of output amplifier, typically 70 dB at dc X, Y, Z = input voltages (full scale = SF, peak = 1.25 SF) SF = scale factor, pretrimmed to 10.00 V but adjustable by the user down to 3 V. In most cases the open loop gain can be regarded as infinite, and SF will be 10 V. The operation performed by the AD534, can then be described in terms of equation: Figure 3. Basic Multiplier Connection In some cases the user may wish to reduce ac feedthrough to a minimum (as in a suppressed carrier modulator) by applying an external trim voltage ( 30 mV range required) to the X or Y input (see Figure 1). Figure 19 shows the typical ac feedthrough with this adjustment mode. Note that the Y input is a factor of 10 lower than the X input and should be used in applications where null suppression is critical. The high impedance Z2 terminal of the AD534 may be used to sum an additional signal into the output. In this mode the output amplifier behaves as a voltage follower with a 1 MHz small signal bandwidth and a 20 V/s slew rate. This terminal should always be referenced to the ground point of the driven system, particularly if this is remote. Likewise, the differential inputs should be referenced to their respective ground potentials to realize the full accuracy of the AD534. ( X1 - X 2 ) (Y1 - Y 2 ) = 10 V ( Z1 - Z2 ) REV. B -5- AD534 A much lower scaling voltage can be achieved without any reduction of input signal range using a feedback attenuator as shown in Figure 4. In this example, the scale is such that VOUT = XY, so that the circuit can exhibit a maximum gain of 10. This connection results in a reduction of bandwidth to about 80 kHz without the peaking capacitor CF = 200 pF. In addition, the output offset voltage is increased by a factor of 10 making external adjustments necessary in some applications. Adjustment is made by connecting a 4.7 M resistor between Z1 and the slider of a pot connected across the supplies to provide 300 mV of trim range at the output. X INPUT 10V FS 12V PK X1 X2 +VS +15V OUTPUT , 12V PK = (X1 - X2) (Y1 - Y2) (SCALE = 1V) OPTIONAL PEAKING CAPACITOR CF = 200pF X INPUT 10V FS 12V PK X1 X2 OUT SF Z1 Z2 Y INPUT 10V FS 12V PK Y1 Y2 -VS IOUT = (X1 - X2) (Y1 - Y2) 10V INTEGRATOR CAPACITOR (SEE TEXT) 1 RS +VS CURRENT-SENSING RESISTOR, RS, 2k MIN AD534 Figure 5. Conversion of Output to Current OPERATION AS A SQUARER OUT AD534 SF Z1 90k 10k Z2 Y INPUT 10V FS 12V PK Y1 Y2 -VS -15V Operation as a squarer is achieved in the same fashion as the multiplier except that the X and Y inputs are used in parallel. The differential inputs can be used to determine the output polarity (positive for X1 = Yl and X 2 = Y2, negative if either one of the inputs is reversed). Accuracy in the squaring mode is typically a factor of 2 better than in the multiplying mode, the largest errors occurring with small values of output for input below 1 V. If the application depends on accurate operation for inputs that are always less than 3 V, the use of a reduced value of SF is recommended as described in the Functional Description section (previous page). Alternatively, a feedback attenuator may be used to raise the output level. This is put to use in the difference-of-squares application to compensate for the factor of 2 loss involved in generating the sum term (see Figure 8). The difference-of-squares function is also used as the basis for a novel rms-to-dc converter shown in Figure 15. The averaging filter is a true integrator, and the loop seeks to zero its input. For this to occur, (VIN)2 - (VOUT)2 = 0 (for signals whose period is well below the averaging time-constant). Hence VOUT is forced to equal the rms value of VIN. The absolute accuracy of this technique is very high; at medium frequencies, and for signals near full scale, it is determined almost entirely by the ratio of the resistors in the inverting amplifier. The multiplier scaling voltage affects only open loop gain. The data shown is typical of performance that can be achieved with an AD534K, but even using an AD534J, this technique can readily provide better than 1% accuracy over a wide frequency range, even for crest-factors in excess of 10. Figure 4. Connections for Scale-Factor of Unity Feedback attenuation also retains the capability for adding a signal to the output. Signals may be applied to the high impedance Z2 terminal where they are amplified by +10 or to the common ground connection where they are amplified by +1. Input signals may also be applied to the lower end of the 10 k resistor, giving a gain of -9. Other values of feedback ratio, up to X100, can be used to combine multiplication with gain. Occasionally it may be desirable to convert the output to a current, into a load of unspecified impedance or dc level. For example, the function of multiplication is sometimes followed by integration; if the output is in the form of a current, a simple capacitor will provide the integration function. Figure 5 shows how this can be achieved. This method can also be applied in squaring, dividing and square rooting modes by appropriate choice of terminals. This technique is used in the voltagecontrolled low-pass filter and the differential-input voltage-tofrequency converter shown in the Applications section. -6- REV. B AD534 OPERATION AS A DIVIDER OPERATION AS A SQUARE ROOTER The AD535, a pin-for-pin functional equivalent to the AD534, has guaranteed performance in the divider and square-rooter configurations and is recommended for such applications. Figure 6 shows the connection required for division. Unlike earlier products, the AD534 provides differential operation on both numerator and denominator, allowing the ratio of two floating variables to be generated. Further flexibility results from access to a high impedance summing input to Y1. As with all dividers based on the use of a multiplier in a feedback loop, the bandwidth is proportional to the denominator magnitude, as shown in Figure 23. + X INPUT (DENOMINATOR) +10V FS +12V PK - X1 X2 OUT SF Z1 Z2 OPTIONAL SUMMING INPUT 10V PK Y1 Y2 -VS -15V Z INPUT (NUMERATOR) 10V FS, 12V PK +VS +15V OUTPUT, 12V PK 10V (Z2 - Z1) = + Y1 (X1 - X2) The operation of the AD534 in the square root mode is shown in Figure 7. The diode prevents a latching condition which could occur if the input momentarily changes polarity. As shown, the output is always positive; it may be changed to a negative output by reversing the diode direction and interchanging the X inputs. Since the signal input is differential, all combinations of input and output polarities can be realized, but operation is restricted to the one quadrant associated with each combination of inputs. OUTPUT, = 12V PK 10V (Z2 - Z1) +X2 X1 X2 +VS +15V OUT OPTIONAL SUMMING INPUT, X, 10V PK SF Z1 Z2 Y1 Y2 -VS -15V REVERSE THIS AND X INPUTS FOR NEGATIVE OUTPUTS RL (MUST BE PROVIDED) AD534 AD534 - Z INPUT 10V FS + 12V PK Figure 6. Basic Divider Connection Figure 7. Square-Rooter Connection Without additional trimming, the accuracy of the AD534K and L is sufficient to maintain a 1% error over a 10 V to 1 V denominator range. This range may be extended to 100:1 by simply reducing the X offset with an externally generated trim voltage (range required is 3.5 mV max) applied to the unused X input (see Figure 1). To trim, apply a ramp of +100 mV to +V at 100 Hz to both X1 and Z1 (if X2 is used for offset adjustment, otherwise reverse the signal polarity) and adjust the trim voltage to minimize the variation in the output.* Since the output will be near +10 V, it should be ac-coupled for this adjustment. The increase in noise level and reduction in bandwidth preclude operation much beyond a ratio of 100 to 1. As with the multiplier connection, overall gain can be introduced by inserting a simple attenuator between the output and Y2 terminal. This option, and the differential-ratio capability of the AD534 are utilized in the percentage-computer application shown in Figure 12. This configuration generates an output proportional to the percentage deviation of one variable (A) with respect to a reference variable (B), with a scale of one volt per percent. In contrast to earlier devices, which were intolerant of capacitive loads in the square root modes, the AD534 is stable with all loads up to at least 1000 pF. For critical applications, a small adjustment to the Z input offset (see Figure 1) will improve accuracy for inputs below 1 V. *See the AD535 data sheet for more details. REV. B -7- AD534-Applications Section The versatility of the AD534 allows the creative designer to implement a variety of circuits such as wattmeters, frequency doublers and automatic gain controls to name but a few. A A-B 2 X1 X2 +VS +15V 2 2 OUTPUT = A - B 10V MODULATION INPUT, EM X1 X2 +VS +15V EM E sin 10V C OUT Z1 OUTPUT = 1 t SF OUT 30k Z1 10k Z2 AD534 CARRIER INPUT EC sin t Z2 Y1 Y2 -VS -15V SF AD534 B A+B 2 Y1 Y2 -VS -15V THE SF PIN OR A Z-ATTENUATOR CAN BE USED TO PROVIDE OVERALL SIGNAL AMPLIFICATION, OPERATION FROM A SINGLE SUPPLY POSSIBLE; BIAS Y2 TO VS/2. Figure 8. Difference-of-Squares Figure 11. Linear AM Modulator CONTROL INPUT, EC, ZERO TO 5V SET GAIN 1k -VS X1 X2 +VS +15V 9k X1 X2 1k SF Z1 +VS +15V OUTPUT = (100V) (1% PER VOLT) A-B B OUT 2k SF AD534 Z1 39k 1k Z2 OUTPUT, EE =CS 0.1V 0.005 F 12V PK OUT AD534 Z2 B INPUT (+VE ONLY) Y1 Y2 -VS -15V Y1 SIGNAL INPUT, ES, 5V PK Y2 -VS -15V A INPUT () NOTES: 1) GAIN IS X 10 PER-VOLT OF EC, ZERO TO X 50 2) WIDEBAND (10Hz - 30kHz) OUTPUT NOISE IS 3mV RMS, TYP CORRESPONDING TO A.F.S. S/N RATIO OF 70dB 3) NOISE REFERRED TO SIGNAL INPUT, WITH EC = 5V, IS 60 V RMS, TYP 4) BANDWITH IS DC TO 20kHz, -3dB, INDEPENDENT OF GAIN OTHER SCALES, FROM 10% PER VOLT TO 0.1% PER VOLT CAN BE OBTAINED BY ALTERING THE FEEDBACK RATIO. Figure 9. Voltage-Controlled Amplifier Figure 12. Percentage Computer X1 X2 18k 10k +VS +15V X1 OUTPUT = (10V) sin E WHERE = 2 10V X2 +VS +15V OUT 4.7k Z1 4.3k Z2 3k AD534 SF OUT AD534 SF Z1 Z2 INPUT, Y 10V FS Y1 Y2 -VS -15V OUTPUT, = (10V) 5V/PK y 1+y Y WHERE y = (10V) INPUT, E 0 TO +10V Y1 Y2 -VS -15V USING CLOSE TOLERANCE RESISTORS AND AD534L, ACCURACY OF FIT IS WITHIN 0.5% AT ALL POINTS. IS IN RADIANS. Figure 10. Sine-Function Generator Figure 13. Bridge-Linearization Function -8- AD534 +15V 39k X1 X2 +VS +15V ADJ 8kHz 3-30p 2 3 82k 7 OUTPUT 15V APPROX. 2k OUT AD534 SF Z1 Z2 + CONTROL INPUT, EC 100mV TO 10V - Y1 Y2 -VS -15V ADJ 1kHz 500 2.2k (= R) 0.01 (= C) AD211 PINS 5, 6, 8 TO +15V PINS 1, 4 TO -15V EC 1 f= 40 CR = 1kHz PER VOLT WITH VALUES SHOWN CALIBRATION PROCEDURE: WITH EC = 1.0V, ADJUST POT TO SET f = 1.000kHz. WITH EC = 8.0V ADJUST TRIMMER CAPACITOR TO SET f = 8.000kHz. LINEARITY WILL TYPICALLY BE WITHIN 0.1% OF FS FOR ANY OTHER INPUT. DUE TO DELAYS IN THE COMPARATOR, THIS TECHNIQUE IS NOT SUITABLE FOR MAXIMUM FREQUENCIES ABOVE 10kHz. FOR FREQUENCIES ABOVE 10kHz THE AD537 VOLTAGE-TO-FREQUENCY CONVERTER IS RECOMMENDED. A TRIANGLE-WAVE OF 5V PK APPEARS ACROSS THE 0.01 F CAPACITOR; IF USED AS AN OUTPUT, A VOLTAGE-FOLLOWER SHOULD BE INTERPOSED. Figure 14. Differential-Input Voltage-to-Frequency Converter MATCHED TO 0.025% 20k 10k - AD741K 10 F NONPOLAR X1 X2 +VS +15V 10k OUT + 5k + 10 F SOLID Ta Z1 - 10k Y1 Y2 20k Z2 10M -VS -15V ZERO ADJ +15V + AD741J OUTPUT 0 TO +5V 10k INPUT 5V RMS FS 10V PEAK RMS + DC MODE AC RMS AD534 10k SF CALIBRATION PROCEDURE: WITH 'MODE' SWITCH IN 'RMS + DC' POSITION, APPLY AN INPUT OF +1.00VDC. ADJUST ZERO UNTIL OUTPUT READS SAME AS INPUT. CHECK FOR INPUTS OF 10V; OUTPUT SHOULD BE WITHIN 0.05% (5mV). ACCURACY IS MAINTAINED FROM 60Hz TO 100kHz, AND IS TYPICALLY HIGH BY 0.5% AT 1MHz FOR VIN = 4V RMS (SINE, SQUARE OR TRIANGULAR-WAVE). PROVIDED THAT THE PEAK INPUT IS NOT EXCEEDED, CREST-FACTORS UP TO AT LEAST TEN HAVE NO APPRECIABLE EFFECT ON ACCURACY . INPUT IMPEDANCE IS ABOUT 10k ; FOR HIGH (10M ) IMPEDANCE, REMOVE MODE SWITCH AND INPUT COUPLING COMPONENTS. FOR GUARANTEED SPECIFICATIONS THE AD536A AND AD636 ARE OFFERED AS A SINGLE PACKAGE RMS-TO-DC CONVERTER. Figure 15. Wideband, High-Crest Factor, RMS-to-DC Converter REV. B -9- AD534-Typical Performance Curves (typical at +25 C, with V = S 14 PEAK POSITIVE OR NEGATIVE SIGNAL - Volts OUTPUT, RL 12 ALL INPUTS, SF = 10V 2k PK-PK FEEDTHROUGH - mV 100 1000 15 V dc, unless otherwise noted) 10 10 X-FEEDTHROUGH 8 1 Y-FEEDTHROUGH 6 4 8 10 12 14 16 18 POSITIVE OR NEGATIVE SUPPLY - Volts 20 0.1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 16. Input/Output Signal Range vs. Supply Voltages Figure 19. AC Feedthrough vs. Frequency 800 700 600 BIAS CURRENT - nA 500 400 300 200 100 SCALING VOLTAGE = 3V V/ Hz SCALING VOLTAGE = 10V NOISE SPECTRAL DENSITY - 1.5 1 SCALING VOLTAGE = 10V 0.5 SCALING VOLTAGE = 3V 0 -60 -40 -20 0 20 40 60 80 TEMPERATURE - C 100 120 140 0 10 100 1k FREQUENCY - Hz 10k 100k Figure 17. Bias Currents vs. Temperature (X, Y or Z Inputs) Figure 20. Noise Spectral Density vs. Frequency 90 80 70 60 CMRR - dB 50 40 30 20 10 0 100 TYPICAL FOR ALL INPUTS 100 OUTPUT NOISE VOLTAGE - V rms 90 CONDITIONS: 10Hz - 10kHz BANDWIDTH 80 70 60 50 1k 10k FREQUENCY - Hz 100k 1M 2.5 5 7.5 SCALING VOLTAGE, SF - Volts 10 Figure 18. Common-Mode Rejection Ratio vs. Frequency Figure 21. Wideband Noise vs. Scaling Voltage -10- AD534 10 0dB = 0.1V RMS, RL= 2k OUTPUT RESPONSE - dB 0 CL = 0pF -10 CL 1000pF CF = 0 -20 WITH X10 FEEDBACK ATTENUATOR -30 10k CL CF 1000pF 200pF +40 +60 OUTPUT - dB ( VO ) VZ VX = 100mV dc VZ = 10mV rms +20 VX = 1V dc VZ = 100mV rms 0 NORMAL CONNECTION -20 VX = 10V dc VZ = 1V rms 100k 1M FREQUENCY - Hz 10M 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 22. Frequency Response as a Multiplier Figure 23. Frequency Response vs. Divider Denominator Input Voltage REV. B -11- AD534 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). H-10A Package TO-100 REFERENCE PLANE 0.185 (4.70) 0.165 (4.19) 0.562 (14.30) 0.500 (12.70) 0.115 (2.92) 0.23 (5.84) 0.355 (9.02) 0.305 (7.75) 0.370 (9.40) 0.335 (8.51) 4 3 56 7 8 9 2 1 10 0.045 (1.14) 0.021 (0.53) 0.044 (1.12) 0.032 (0.81) 0.040 (1.01) 0.010 (0.25) 0.016 (0.41) 0.019 (0.48) 0.016 (0.41) 0.029 (0.74) (DIM. B) 0.034 (0.86) (DIM. A) 0.028 (0.71) 36 SEATING PLANE D-14 Package TO-116 0.430 (10.92) 0.040 R (1.02) 14 8 0.265 0.029 (6.73) (7.37 1 0.700 0.010 17.78 0.25 0.085 (2.16) 7 0.31 (7.87 0.01 0.25) 0.095 (2.41) 0.010 0.25) PIN 1 0.035 0.89 0.010 0.25 0.125 (3.18) MIN 0.180 4.57 0.030 0.76 0.30 (7.62) REF 0.10 0.002 (0.25 0.05) 0.017 +0.003 -0.002 0.430 +0.080 -0.050 0.100 (2.54) 0.047 0.007 E-20A Package LCC 0.200 (5.08) BSC 0.100 (2.54) BSC 0.075 (1.91) REF 0.015 (0.38) MIN 0.055 (1.40) 0.045 (1.14) 0.028 (0.71) 0.050 (1.27) BSC 0.022 (0.56) BOTTOM VIEW PIN 1 0.040 REF 45 (1.02 45 ) 3 PLACES 0.358 (9.09) 0.342 (8.69) 0.020 REF 45 (0.51 45 ) 0.100 (2.54) 0.060 (1.52) -12- REV. B PRINTED IN U.S.A. C495e-0-6/99 |
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